Science – Future of Lithuania / Mokslas – Lietuvos Ateitis, Vol 5, No 2 (2013)

Energy Detector Implementaton in FPGA for Estimation of Word Boundaries

Liudas Stašionis
Tomyslav Sledevič


This paper describes implementation of the word boundary estimation module in FPGA. The boundary estimation module is based on energy detector. This module is optimized for implementation in FPGA. It occupies 54 logical elements “Slice” and uses only 0.7% of “Spartan-6 LX45” resources. Experiments with this module were performed at different signal/noise (S/N) ratio. For S/N of 20 dB and 15 dB word boundaries were estimated with 100% accuracy. Acceptable results were also achieved, for S/N ratio of 10 dB and 5 dB, as the estimation accuracy was 95% and 93%, respectively.

Article in Lithuanian

Article in: Lithuanian

Article published: 2013-05-24

Keyword(s): field programmable gate array; word boundary determination; energy detector; silent interval; signal noise ratio

DOI: 10.3846/mla.2013.19

Full Text: PDF pdf

Science – Future of Lithuania / Mokslas – Lietuvos Ateitis ISSN 2029-2341, eISSN 2029-2252
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 License.