Science – Future of Lithuania / Mokslas – Lietuvos Ateitis, Vol 3, No 1 (2011)

Feasibility Study of 8-Bit Microcontroller Applications for Ethernet

Lech Gulbinovič

Abstract


Feasibility study of 8-bit microcontroller applications for Ethernet is presented. Designed device is based on ATmega32 microcontroller and 10 Mbps Ethernet controller ENC28J60. Device is simulated as mass queuing theoretical model with ticket booking counter. Practical explorations are accomplished and characteristics are determined. Practical results are compared to theoretical ones. Program code and device packet processing speed optimization are discussed. Microcontroller packet processing speed and packet latency depend on packet size. For ICMP protocol packet processing speed varies 1.4–2.1 Mbps, latency – 0.8–8.4 ms. UDP protocol packet processing speed varies 1.3–1.8 Mbps, latency – 1.1–9.6 ms. Packet processing speed depends on compilation settings and program code compression level. Best results are reached on optimization le­vel ‑O3, then speed increased ~3% but program code size increased 68% comparing to –Os optimization level.

Article in Lithuanian


Article in: Lithuanian

Article published: 2011-08-22

Keyword(s): Ethernet; microcontroller; mass queuing theory model; compilation; packet processing speed; optimization

DOI: 10.3846/mla.2011.017

Full Text: PDF pdf

Science – Future of Lithuania / Mokslas – Lietuvos Ateitis ISSN 2029-2341, eISSN 2029-2252
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 License.